OBSSCircuit DescriptionV1.1010/02/94 20:07 CET.Component & analysis parameters of a circuit.TINA 9.3.200.277 SF-TIB(c) Copyright 1993,94,95,96 DesignSoft Inc. All rights reserved.  $Circuit$yTo?t[All] miny2=-20 maxy2=140 divsy2=8 scaley2=1 miny4=-20 maxy4=140 divsy4=8 scaley4=1 minx1=-5.5 maxx1=-3 divsx1=5 scalex1=0 minx7=10maxx7=10000000 divsx7=6 scalex7=2miny7=0 maxy7=135 divsy7=3 scaley7=0 minx2=10maxx2=100000000 divsx2=7 scalex2=2 minx4=10maxx4=100000000 divsx4=7 scalex4=2miny1=-3.000674089maxy1=-1.500000049 divsy1=2 scaley1=0 [ZoOhms] miny2=140 maxy2=180 divsy2=4 scaley2=1 miny4=140 maxy4=180 divsy4=4 scaley4=1 [Inoise] miny12=0 maxy12=1E-12 divsy12=4 scaley12=0[Vout] miny1=-3.02 maxy1=-3 divsy1=2 scaley1=0 minx2=10maxx2=10000000 divsx2=6 scalex2=2 minx4=10maxx4=10000000 divsx4=6 scalex4=2 minx1=-5 maxx1=-2.5 divsx1=5 scalex1=0miny2=0maxy2=107.90543588 divsy2=2 scaley2=1miny4=0maxy4=107.90543588 divsy4=2 scaley4=1 [Vnoise] miny12=3E-8maxy12=5.99999999999999E-8 divsy12=3 scaley12=0[Zo]miny2=125.13202047maxy2=125.13202048 divsy2=4 scaley2=1miny4=125.13202047maxy4=125.13202048 divsy4=4 scaley4=1[Vo2] minx7=10maxx7=1000000000 divsx7=8 scalex7=2[Gain] miny2=-60 maxy2=120 divsy2=9 scaley2=1 miny4=-60 maxy4=120 divsy4=9 scaley4=1 miny7=-20 maxy7=160 divsy7=9 scaley7=0minx7=1maxx7=1000000 divsx7=6 scalex7=2VER=1.0Font0=Verdana,14Font1=Verdana,14,BRect0=2,0,0,85,22Rect1=1,0,0,85,10Rect2=1,0,10,10,17Rect3=1,10,10,75,17Rect4=1,75,10,85,17Rect5=1,0,17,50,22Rect6=1,50,17,85,22Text0=0,2,2,TitleText1=0,2,11,SizeText2=0,2,18,DateText3=0,12,11,Document No.Text4=0,77,11,RevText5=0,52,18,SheetText6=0,70,18,ofField0=1,T,11,2,80Field1=1,T,11,5,80Field2=1,S,4,13,5Field3=1,T,14,13,40Field4=1,R,78,13,6Field5=1,D,12,18,30Field6=1,P,64,18,3Field7=1,A,77,18,3-F0=Discrete LDO with Negative Output Voltage F3=SBOA530F4=A F5=10/5/2021F6=1F7=1;88T_058C64E020211019113918?((T_037B366020211019113918;PPT_037B32A020211019113918;((T_037B2EE020211019113918;XXT_037B2B2020211019113918;H@@H@@T_037B23A020211019113918?T_037B1FE020211019113918;hPPhPPT_037B1C2020211019113918;PPPPT_037B186020211019113918;PPPPT_037B14A020211019113918;pPpPT_037B10E020211019113918; X ` X `T_037B0D2020211019113918?8P8PPT_037B096020211019113918;88T_037B05A020211019113918;8@808@80T_037B01E020211019113918;8888T_037AFE2020211019113918;phphT_037AFA6020211019113918;@0@0T_037AF6A020211019113918;T_037AF2E020211019113918?T_037AEF2020211019113918;T_037AEB6020211019113918;T_037AE7A020211019113918;P0P0T_037AE3E020211019113918;T_0DE4099020211019113918?0 (0  (T_0DE40D5020211019113918?PPPPPT_0DE41C5020211019113918;PPPPT_0DE4201020211019113918;T_04970A3020211019113918;T_04EB616020211019113918;((T_0B72536020211019114000;T_0B72572020211019114000?(0(00T_0B71858020211019114004 BR1T_08C82A3020201016153707R_AX300_W100 (R)@@?Y@ BR2T_08C8301020201016153710R_AX300_W100 (R)X@@?Y@XB@T1T_08C841B020201016153730TO206AA (2N2222)2N2222 SPICE-BJT? BC1T_08C8535020201016153754CP_CYL300_D700_L1400 (C) A:Y>@eAY@? BResrT_08C864F020201016153817R_AX300_W100 (R)?@?Y@ B@C2T_08C86AD020201016153824CP_CYL300_D700_L1400 (C) 4 ;?@eAY@?BrVoutT_08C8825020201016153854 NOPCB (VF) BPR4T_05EF3DF020201016160633R_AX300_W100 (R)@@?Y@:B9(@(U1T_0F424AA020210922094954 TLV9002TLV9002SC:\Users\a0225818\AppData\Local\Temp\DesignSoft\{Tina9-TI-11062017-190831}\TLV9002SCK#TLV9002Label#PP(d*VCCzD  @d*VEE A  @d*OUT  @d*IN+p4Gp4G<  @d*IN-8 @h 00g"- Courier New?g"+ Courier New ?g"+ Courier New?c/@c/@* TLV9002 - Rev. B(* Created by Paul Goedeke; May 01, 2018B* Created with Green-Williams-Lis Op Amp Macro-model Architecture2* Copyright 2018 by Texas Instruments Corporation7******************************************************$* MACRO-MODEL SIMULATED PARAMETERS:7******************************************************D* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol)* UNITY GAIN BANDWIDTH (GBW)9* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)4* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)%* DIFFERENTIAL INPUT IMPEDANCE (Zid)$* COMMON-MODE INPUT IMPEDANCE (Zic)0* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)+* OUTPUT CURRENT THROUGH THE SUPPLY (Iout)1* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)1* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)/* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)%* SHORT-CIRCUIT OUTPUT CURRENT (Isc)* QUIESCENT CURRENT (Iq))* SETTLING TIME VS. CAPACITIVE LOAD (ts)* SLEW RATE (SR)-* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD* LARGE SIGNAL RESPONSE* OVERLOAD RECOVERY TIME (tor)* INPUT BIAS CURRENT (Ib)* INPUT OFFSET CURRENT (Ios)* INPUT OFFSET VOLTAGE (Vos)(* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)C* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm))* INPUT/OUTPUT ESD CELLS (ESDin, ESDout)7******************************************************$.subckt TLV9002 IN+ IN- VCC VEE OUT7******************************************************* MODEL DEFINITIONS:9.model BB_SW VSWITCH(Ron=50 Roff=1e12 Von=700e-3 Voff=0):.model ESD_SW VSWITCH(Ron=50 Roff=1e12 Von=250e-3 Voff=0)?.model OL_SW VSWITCH(Ron=1e-3 Roff=1e9 Von=900e-3 Voff=800e-3)9.model OR_SW VSWITCH(Ron=10e-3 Roff=1e9 Von=1e-3 Voff=0)&.model R_NOISELESS RES(T_ABS=-273.15)7******************************************************I_OS ESDn MID 3PI_B 33 MID 5PV_GRp 58 MID 180V_GRn 59 MID -180V_ISCp 52 MID 42V_ISCn 53 MID -42V_ORn 41 VCLP -1.22V11 57 40 0V_ORp 39 VCLP 1.22V12 56 38 0V4 29 OUT 0VCM_MIN 79 VEE_B -100MVCM_MAX 80 VCC_B 100MI_Q VCC VEE 60UV_OS 22 33 396.11U$XVOS_VCM 21 22 VCC VEE VOS_SRC_0C30 23 24 15.92U $R85 24 MID R_NOISELESS 30K #R84 24 23 R_NOISELESS 10K "R83 23 MID R_NOISELESS 1 GVCCS10 26 MID 25 MID -1C29 27 MID 19.89F #R82 25 27 R_NOISELESS 10K #R81 25 28 R_NOISELESS 70K "R80 28 MID R_NOISELESS 1 GVCCS9 28 MID 24 MID -3.8$GVCCS4 23 MID CL_CLAMP 29 -87"R79 30 MID R_NOISELESS 1 (XU1 31 MID MID 30 VCCS_LIM_ZO_0$R78 31 MID R_NOISELESS 101 C22 31 26 15.92F #R65 31 26 R_NOISELESS 10K "R64 26 MID R_NOISELESS 1 $R63 29 30 R_NOISELESS 400K 0XCLAWn MID VIMON VEE_B 32 VCCS_LIM_CLAW-_0Xe_n ESDp 33 VNSE_0Xi_nn ESDn MID FEMT_0_0Xi_np MID 33 FEMT_0_0+S5 VEE ESDp VEE ESDp S_VSWITCH_1+S4 VEE ESDn VEE ESDn S_VSWITCH_2+S2 ESDn VCC ESDn VCC S_VSWITCH_3+S3 ESDp VCC ESDp VCC S_VSWITCH_4C28 34 MID 1P #R77 35 34 R_NOISELESS 100 C27 36 MID 1P #R76 37 36 R_NOISELESS 100 "R75 MID 38 R_NOISELESS 1 GVCCS8 38 MID 39 MID -1"R74 40 MID R_NOISELESS 1 GVCCS7 40 MID 41 MID -1C25 42 MID 25F %R69 MID 42 R_NOISELESS 1MEG #GVCCS6 42 MID VSENSE MID -1UC20 CLAMP MID 151.6N (R68 MID CLAMP R_NOISELESS 1MEG *XVCCS_LIM_2 43 MID MID CLAMP VCCS_LIM_2_0%R44 MID 43 R_NOISELESS 1MEG &XVCCS_LIM_1 44 45 MID 43 VCCS_LIM_1_0$Rdummy MID 29 R_NOISELESS 40K )R61 MID 46 R_NOISELESS 273.3609 C16 46 47 1.1018N &R58 47 46 R_NOISELESS 100MEG 'GVCCS2 47 MID VEE_B MID -258.98M"R57 MID 47 R_NOISELESS 1 )R56 MID 48 R_NOISELESS 273.3609 C15 48 49 1.1018N &R55 49 48 R_NOISELESS 100MEG 'GVCCS1 49 MID VCC_B MID -258.98M"R54 MID 49 R_NOISELESS 1 'R49 MID 50 R_NOISELESS 337.4K C14 50 51 591.7F &R48 51 50 R_NOISELESS 100MEG %G_adjust 51 MID ESDp MID -44.81M"Rsrc MID 51 R_NOISELESS 1 .XIQPos VIMON MID MID VCC VCCS_LIMIT_IQ_0.XIQNeg MID VIMON VEE MID VCCS_LIMIT_IQ_0C_DIFF ESDp ESDn 1P 1XCL_AMP 52 53 VIMON MID 54 55 CLAMP_AMP_LO_0+SOR_SWp CLAMP 56 CLAMP 56 S_VSWITCH_5+SOR_SWn 57 CLAMP 57 CLAMP S_VSWITCH_6.XGR_AMP 58 59 60 MID 61 62 CLAMP_AMP_HI_0#R39 58 MID R_NOISELESS 1T #R37 59 MID R_NOISELESS 1T &R42 VSENSE 60 R_NOISELESS 1M C19 60 MID 1F "R38 61 MID R_NOISELESS 1 "R36 MID 62 R_NOISELESS 1 "R40 61 63 R_NOISELESS 1M "R41 62 64 R_NOISELESS 1M C17 63 MID 1F C18 MID 64 1F *XGR_SRC 63 64 CLAMP MID VCCS_LIM_GR_0"R21 54 MID R_NOISELESS 1 "R20 MID 55 R_NOISELESS 1 "R29 54 65 R_NOISELESS 1M "R30 55 66 R_NOISELESS 1M C9 65 MID 1F C8 MID 66 1F ,XCL_SRC 65 66 CL_CLAMP MID VCCS_LIM_4_0#R22 52 MID R_NOISELESS 1T #R19 MID 53 R_NOISELESS 1T 0XCLAWp VIMON MID 67 VCC_B VCCS_LIM_CLAW+_0%R12 67 VCC_B R_NOISELESS 1K "R16 67 68 R_NOISELESS 1M %R13 VEE_B 32 R_NOISELESS 1K "R17 69 32 R_NOISELESS 1M C6 69 MID 1F C5 MID 68 1F $G2 VCC_CLP MID 68 MID -1M(R15 VCC_CLP MID R_NOISELESS 1K $G3 VEE_CLP MID 69 MID -1M(R14 MID VEE_CLP R_NOISELESS 1K V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}OGVO- COM VO- VALUE = {IF(V(VIN,COM)V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}OGVO- COM VO- VALUE = {IF(V(VIN,COM)10E-3 | V(OLP,COM)>10E-3),1,0)}.ENDS*6.SUBCKT VCCS_EXT_LIM_0 VIN+ VIN- IOUT- IOUT+ VP+ VP-.PARAM GAIN = 1IG1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}.ENDS*IN+IN-VCCVEEOUTDBP VeeT_046265E020210922102549Battery_9V_V (V):BLU2T_046242A020210922103815 SO8 (TLV431) TLV431TLV431[C:\ELAB_MODEL_WS\ELAB_MODEL_DS\Part_Numbers\TLV431\Active_Work\TINA\TLV431_TINA\TLV431.CIRSCK#TLV431Label  PP(d*Fdbk 1997 Design @d*A  @d*K@  @h eddeddeddeddeddeddedd=@=@?*$ * TLV431N*****************************************************************************N* (C) Copyright 2009 Texas Instruments Incorporated. All rights reserved. **N*****************************************************************************N** Thismodelis designed as an aid for customers of Texas Instruments. **N**TI and itslicensors and suppliers makeno warranties, either expressed **N** or implied, with respect to thismodel, including thewarranties of **N** merchantability or fitness fora particular purpose. The model is **N** provided solely on an "as is" basis. The entirerisk as to its quality **Q** and performance is with the customer ** N******************************************************************************B* This model was developed for Texas Instruments Incorporated by:* AEi Systems, LLC&* 5933 W. Century Blvd., Suite 1100#* Los Angeles, California 90045*Z* This model is subject to change without notice. Neither Texas Instruments Incorporated :* nor AEi Systems is responsible for updating this model.T* For more information regarding modeling services, model libraries and simulation Y* products, please call AEi Systems at (310) 216-1144, or contact AEi Systems by email: I* info@AENG.com. Or visit AEi Systems on the web at http://www.AENG.com.*N******************************************************************************B** Released by: Analog eLab Design Center, Texas Instruments Inc.* Part: TLV431* Date: 12/28/2009* Simulator: TINA-TI #* Simulator Version: 7.0.80.134 SF7* Datasheet: SLVS139T - July 1996 - Revised June 2007 ** Model Version: Final 1.00*N****************************************************************************** * Updates:* * Final 1.00* Release to Web.*N*****************************************************************************.SUBCKT TLV431 A K FdbkV_V2 N59715 A 1.24)G_G4 K A TABLE { V(STAGE2, A) } $+ ( (-10,0)(0,0)(15m,15m)(10,16m) )R_R1 A STAGE1 1 R_R2 A STAGE2 1 C_C2 A STAGE1 159e-6 C_C3 A STAGE2 80n $G_G1 A STAGE1 Fdbk N59715 4(X_D1 A STAGE1 DC_1mV_1A_1V_1nA!G_G3 A STAGE2 STAGE1 A 1-X_D2 STAGE1 N59689 DC_1mV_1A_1V_1nA#X_D3 A K DC_1mV_1A_1V_1nAV_V1 N59689 A 15m .ENDS TLV431*$.subckt DC_1mV_1A_1V_1nA A CCG1 A C TABLE { V(A, C) } ( (-1,-1n)(0,0)(1m,1) (2m,10) (3m,1000) ).ends DC_1mV_1A_1V_1nA *$FdbkAK B8C3T_08C8769020201016153839CP_CYL300_D700_L1400 (C) ư>@eAY@?BnPVeeT_046271A020210922102621 NOPCB (J)Bn `VeeT_0462834020210922102657 NOPCB (J)BnVeeT_0404D18020210923133229 NOPCB (J)BnhPVeeT_15310EE020211005154923 NOPCB (J)Bf(T_08C83BD020201016153719 NOPCB (GND)BfpT_08C870B020201016153828 NOPCB (GND)Bf8@T_08C87C7020201016153846 NOPCB (GND)BfPT_0462600020210922102549 NOPCB (GND)Bf0T_04626BC020210922102554 NOPCB (GND)BfT_03A6AA5020210922161541 NOPCB (GND)8? ]@"MbP??ư>*dh㈵>333333?Y@IG1[dddd??.A.A.AeAMbP?@@??ư> .A$ 4@D@ =B?& .>??ư>ư>ư>ư>ư>ư>?I@?I@?I@& .>#;@& .>-q=ư>MbP?-q=MbP?vIh%<=@@D@& .>?MbP?4@?{Gz?ꌠ9Y>)F @?+= _BKH9$@Y@& .>ư>?.AMbP??????I@?Xd I@nMbP?{Gz?{Gz?MbP????|=Hz>}Ô%IT+GainVout(s)/Vb(s)Noname