ZHCAES5 July 2024 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83826E , DP83826I , DP83848-EP , DP83848Q-Q1 , DP83867CR , DP83867CS , DP83867E , DP83867IR , DP83867IS , DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TC813R-Q1 , DP83TC813S-Q1 , DP83TC814R-Q1 , DP83TC814S-Q1 , DP83TG720R-Q1 , DP83TG720S-Q1 , DP83TG721R-Q1 , DP83TG721S-Q1
Linux 器件樹是用于描述嵌入式系統(tǒng)中硬件組件和配置的數(shù)據(jù)結(jié)構(gòu)。器件樹為操作系統(tǒng)提供了一種標(biāo)準(zhǔn)化方式來了解硬件布局，包括有關(guān)處理器、內(nèi)存、總線和外設(shè)的詳細(xì)信息。器件樹數(shù)據(jù)通常以二進(jìn)制格式（.dtb 文件）存儲，并在啟動期間傳遞給 Linux 內(nèi)核。然后，內(nèi)核使用此信息來動態(tài)綁定器件樹節(jié)點(diǎn)并初始化硬件組件，從而允許在不同的嵌入式平臺上提供高效靈活的硬件支持，而無需將硬件詳細(xì)信息硬編碼到內(nèi)核中。
器件樹代碼塊示例說明了如何在器件樹文件中配置子卡上的四個以太網(wǎng) PHY。CPSW 是指處理器的 MAC 接口，要考慮的主要節(jié)點(diǎn)定義如下：
| MAC 配置 | 所需的 PHY 配置 |
|---|---|
| 在 RX 上對齊 | 在 RX 上移位 |
| 在 RX 上移位 | 在 RX 上對齊 |
| 在 TX 上對齊 | 在 TX 上移位 |
| 在 TX 上移位 | 在 TX 上對齊 |
RGMII 代碼塊：
&davinci_mdio {
phy0: ethernet-phy@0 { //PHY0 is defined and passed to phy-handle
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&phy0>;
};
器件樹代碼塊：
&cpsw0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins_default
&rgmii1_pins_default
&rgmii2_pins_default
&rgmii3_pins_default
&rgmii4_pins_default
>;
};
&cpsw0_port1 {
phy-handle = <&cpsw9g_phy0>;
phy-mode = "rgmii-rxid";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 1>;
};
&cpsw0_port2 {
phy-handle = <&cpsw9g_phy4>;
phy-mode = "rgmii-rxid";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 2>;
};
&cpsw0_port3 {
phy-handle = <&cpsw9g_phy5>;
phy-mode = "rgmii-rxid";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 3>;
};
&cpsw0_port4 {
phy-handle = <&cpsw9g_phy8>;
phy-mode = "rgmii-rxid";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 4>;
};
&cpsw9g_mdio {
bus_freq = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
cpsw9g_phy0: ethernet-phy@0 {
reg = <0>;
};
cpsw9g_phy4: ethernet-phy@4 {
reg = <4>;
};
cpsw9g_phy5: ethernet-phy@5 {
reg = <5>;
};
cpsw9g_phy8: ethernet-phy@8 {
reg = <8>;
};
};當(dāng)電路板正在運(yùn)行時，可以使用終端命令 dmesg grep | mdio 確認(rèn) PHY 地址 (phy[x]) 和 eth 端口 (ethn)。
davinci_mdio c000f00.mdio: phy[0]: device c000f00.mdio:00, driver TI DP83TG720CS1.1
davinci_mdio c000f00.mdio: phy[4]: device c000f00.mdio:04, driver TI DP83TG721CS1.0
davinci_mdio c000f00.mdio: phy[5]: device c000f00.mdio:05, driver TI DP83TC812CS2.0
davinci_mdio c000f00.mdio: phy[8]: device c000f00.mdio:08, driver TI DP83TC814CS2.0
am65-cpsw-nuss c000000.ethernet eth4: PHY [c000f00.mdio:08] driver [TI DP83TC814CS2.0] (irq=POLL)
am65-cpsw-nuss c000000.ethernet eth3: PHY [c000f00.mdio:05] driver [TI DP83TC812CS2.0] (irq=POLL)
am65-cpsw-nuss c000000.ethernet eth2: PHY [c000f00.mdio:04] driver [TI DP83TG721CS1.0] (irq=POLL)
am65-cpsw-nuss c000000.ethernet eth1: PHY [c000f00.mdio:00] driver [TI DP83TG720CS1.1] (irq=POLL)