主頁 接口 LVDS、M-LVDS 和 PECL IC

SN65MLVD207

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全雙工 M-LVDS 收發(fā)器

產(chǎn)品詳情

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm2 8.65 x 6
  • Low-Voltage Differential 30- Line Drivers and Receivers for Signaling Rates(1) Up to 200 Mbps
  • Type-1 Receivers Incorporate 25 mV of Hysteresis
  • Type-2 Receivers Provide an Offset (100 mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1 V to 3.4 V Common-Mode Voltage Range Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • 100-Mbps Devices Available (SN65MLVD200A, 202A, 204A, 205A)
  • M-LVDS Bus Power Up/Down Glitch Free
  • APPLICATIONS
    • Low-Power High-Speed Short-Reach
      Alternative to TIA/EIA-485
    • Backplane or Cabled Multipoint Data and Clock Transmission
    • Cellular Base Stations
    • Central-Office Switches
    • Network Switches and Routers

(1) The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

  • Low-Voltage Differential 30- Line Drivers and Receivers for Signaling Rates(1) Up to 200 Mbps
  • Type-1 Receivers Incorporate 25 mV of Hysteresis
  • Type-2 Receivers Provide an Offset (100 mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1 V to 3.4 V Common-Mode Voltage Range Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • 100-Mbps Devices Available (SN65MLVD200A, 202A, 204A, 205A)
  • M-LVDS Bus Power Up/Down Glitch Free
  • APPLICATIONS
    • Low-Power High-Speed Short-Reach
      Alternative to TIA/EIA-485
    • Backplane or Cabled Multipoint Data and Clock Transmission
    • Cellular Base Stations
    • Central-Office Switches
    • Network Switches and Routers

(1) The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30 , and incorporates controlled transition times to allow for stubs off of the backbone transmission line.

These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of –1 V to 3.4 V. The Type-1 receivers exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly changing signals or loss of input. Type-2 receivers include an offset threshold to provide a known output state under open-circuit, idle-bus, and other faults conditions. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30 , and incorporates controlled transition times to allow for stubs off of the backbone transmission line.

These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of –1 V to 3.4 V. The Type-1 receivers exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly changing signals or loss of input. Type-2 receivers include an offset threshold to provide a known output state under open-circuit, idle-bus, and other faults conditions. The devices are characterized for operation from –40°C to 85°C.

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類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 Multipoint-LVDS Line Driver and Receiver 數(shù)據(jù)表 (Rev. C) 2008年 1月 7日
應(yīng)用簡報 How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
應(yīng)用手冊 Introduction to M-LVDS (TIA/EIA-899) (Rev. A) 2013年 1月 3日
用戶指南 Multipoint-Low Voltage Differential Signaling (M-LVDS) EVM (Rev. B) 2004年 4月 5日
應(yīng)用手冊 M-LVDS Signaling Rate Versus Distance 2003年 4月 9日
應(yīng)用手冊 Interoperability of M-LVDS and BusLVDS 2003年 2月 6日
用戶指南 200 Mbps Multipoint-Low Voltage Differential Signaling (M-LVDS) EVM (Rev. A) 2002年 12月 20日
應(yīng)用手冊 Wired-Logic Signaling with M-LVDS 2002年 10月 31日
應(yīng)用手冊 TIA/EIA-485 and M-LVDS, Power and Speed Comparison 2002年 2月 20日

設(shè)計和開發(fā)

如需其他信息或資源,請點擊以下任一標(biāo)題進(jìn)入詳情頁面查看(如有)。

評估板

MLVD20XBEVM — SN65MLVD203B 和 SN65MLVD204B 全雙工和半雙工多點 LVDS (M-LVDS) 評估模塊

用戶指南: PDF
TI.com 上無現(xiàn)貨
評估板

MLVD20XEVM — M-LVDS 評估模塊

此評估模塊適用于 M-LVDS 收發(fā)器 SN65MLVD203B 和 SN65MLVD204B。
SN65MLVD203B 是全雙工收發(fā)器,SN65MLVD204B 是半雙工收發(fā)器。
用戶指南: PDF
TI.com 上無現(xiàn)貨
仿真模型

SN65MLVD207 IBIS Model

SLLC133.ZIP (18 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice? for TI 設(shè)計和仿真工具

PSpice? for TI 可提供幫助評估模擬電路功能的設(shè)計和仿真環(huán)境。此功能齊全的設(shè)計和仿真套件使用 Cadence? 的模擬分析引擎。PSpice for TI 可免費使用,包括業(yè)內(nèi)超大的模型庫之一,涵蓋我們的模擬和電源產(chǎn)品系列以及精選的模擬行為模型。

借助?PSpice for TI 的設(shè)計和仿真環(huán)境及其內(nèi)置的模型庫,您可對復(fù)雜的混合信號設(shè)計進(jìn)行仿真。創(chuàng)建完整的終端設(shè)備設(shè)計和原型解決方案,然后再進(jìn)行布局和制造,可縮短產(chǎn)品上市時間并降低開發(fā)成本。?

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模擬工具

TINA-TI — 基于 SPICE 的模擬仿真程序

TINA-TI 提供了 SPICE 所有的傳統(tǒng)直流、瞬態(tài)和頻域分析以及更多。TINA 具有廣泛的后處理功能,允許您按照希望的方式設(shè)置結(jié)果的格式。虛擬儀器允許您選擇輸入波形、探針電路節(jié)點電壓和波形。TINA 的原理圖捕獲非常直觀 - 真正的“快速入門”。

TINA-TI 安裝需要大約 500MB。直接安裝,如果想卸載也很容易。我們相信您肯定會愛不釋手。

TINA 是德州儀器 (TI) 專有的 DesignSoft 產(chǎn)品。該免費版本具有完整的功能,但不支持完整版 TINA 所提供的某些其他功能。

如需獲取可用 TINA-TI 模型的完整列表,請參閱:SpiceRack - 完整列表 

需要 HSpice (...)

用戶指南: PDF
英語版 (Rev.A): PDF
封裝 引腳 CAD 符號、封裝和 3D 模型
SOIC (D) 14 Ultra Librarian

訂購和質(zhì)量

包含信息:
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息:
  • 制造廠地點
  • 封裝廠地點

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