ZHCSI83C may 2018 – may 2023 ADC12DL3200
PRODUCTION DATA
The analog inputs of the ADC12DL3200 have internal buffers to enable high input bandwidth and isolate sampling capacitor glitch noise from the input circuit. The analog inputs must be driven differentially as operation with a single-ended signal is not recommended because of performance degradation. AC-coupling or DC-coupling can be used with the analog inputs. The common-mode voltage of the analog inputs is 0 V and is biased internally through single-ended, 50-Ω resistors to AGND on each input pin. When DC-coupled input signals are used the applied differential signal must have a common-mode voltage that meets the device Input common-mode requirements. See VCMI in the Section 6.3 table. The 0-V input common-mode voltage simplifies the interface to split-supply differential amplifiers and to a variety of transformers and baluns.
In single-channel mode, either analog input (AIN+ and AIN– or BIN+ and BIN–) can be used as the input to the ADC core. There is no degradation in analog input bandwidth when using single-channel mode versus dual-channel mode. The input can be chosen using SINGLE_INPUT in the INPUT_MUX register. In dual-channel mode, the analog inputs can be swapped using DUAL_INPUT in the INPUT_MUX register.