ZHCSLO5B December 2020 – December 2021 LM25149
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 Revision History
- 5 說(shuō)明（續(xù)）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Input Voltage Range (VIN)
- 8.3.2 High-Voltage Bias Supply Regulator (VCC, VCCX, VDDA)
- 8.3.3 Precision Enable (EN)
- 8.3.4 Power-Good Monitor (PG)
- 8.3.5 Switching Frequency (RT)
- 8.3.6 Active EMI Filter
- 8.3.7 Dual Random Spread Spectrum (DRSS)
- 8.3.8 Soft Start
- 8.3.9 Output Voltage Setpoint (FB)
- 8.3.10 Minimum Controllable On Time
- 8.3.11 Error Amplifier and PWM Comparator (FB, EXTCOMP)
- 8.3.12 Slope Compensation
- 8.3.13 Inductor Current Sense (ISNS+, VOUT)
- 8.3.14 Hiccup Mode Current Limiting
- 8.3.15 High-Side and Low-Side Gate Drivers (HO, LO)
- 8.3.16 Output Configurations (CNFG)
- 8.3.17 Single-Output Dual-Phase Operation
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Applications
- 9.2.1
Design 1 – High Efficiency 2.1-MHz Synchronous
Buck Regulator
- 9.2.1.1 Design Requirements
- 9.2.1.2
Detailed Design Procedure
- 9.2.1.2.1 Custom Design With WEBENCH? Tools
- 9.2.1.2.2 Custom Design With Excel Quickstart Tool
- 9.2.1.2.3 Buck Inductor
- 9.2.1.2.4 Current-Sense Resistance
- 9.2.1.2.5 Output Capacitors
- 9.2.1.2.6 Input Capacitors
- 9.2.1.2.7 Frequency Set Resistor
- 9.2.1.2.8 Feedback Resistors
- 9.2.1.2.9 Compensation Components
- 9.2.1.2.10 Active EMI Components
- 9.2.1.3 Application Curves
- 9.2.2 Design 2 – High Efficiency 440-kHz Synchronous Buck Regulator
- 9.2.3 Design 3 – Dual-Phase 400-kHz 20-A Synchronous Buck Regulator
- 9.2.1
Design 1 – High Efficiency 2.1-MHz Synchronous
Buck Regulator
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGY|24
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGY|24
訂購(gòu)信息
8.3.10 Minimum Controllable On Time
There are two limitations to the minimum output voltage adjustment range: the LM25149 voltage reference of 0.8 V and the minimum controllable switch-node pulse width, tON(min).
tON(min) effectively limits the voltage step-down conversion ratio VOUT / VIN at a given switching frequency. For fixed-frequency PWM operation, the voltage conversion ratio must satisfy Equation 6.
where
- tON(min) is 50 ns (typical).
- FSW is the switching frequency.
If the desired voltage conversion ratio does not meet the above condition, the LM25149 transitions from fixed switching frequency operation to a pulse-skipping mode to maintain output voltage regulation. For example, if the desired output voltage is 5 V with an input voltage of 24 V and switching frequency of 2.1 MHz, use Equation 7 to verify that the conversion ratio.
For wide-VIN applications and low output voltages, an alternative is to reduce the LM25149 switching frequency to meet the requirement of Equation 6.