ZHCSHU8F October 2008 – July 2019 LM5575-Q1
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- PWP|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- PWP|16
訂購信息
7.4.2 Oscillator and Sync Capability
The LM5575-Q1 oscillator frequency is set by a single external resistor connected between the RT pin and the AGND pin. Place the RT resistor very close to the device and connected directly to the pins of the IC (RT and AGND). To set a desired oscillator frequency (F), the necessary value for the RT resistor can be calculated by Equation 1:
The SYNC pin can be used to synchronize the internal oscillator to an external clock. The external clock must be of higher frequency than the free-running frequency set by the RT resistor. A clock circuit with an open-drain output is the recommended interface from the external clock to the SYNC pin. The clock pulse duration must be greater than 15 ns.
Multiple LM5575-Q1 devices can be synchronized together simply by connecting the SYNC pins together. In this configuration, all of the devices will be synchronized to the highest frequency device. The diagram in Figure 11 shows the SYNC input and output features of the LM5575-Q1. The internal oscillator circuit drives the SYNC pin with a strong pulldown and weak pullup inverter. When the SYNC pin is pulled low either by the internal oscillator or an external clock, the ramp cycle of the oscillator is terminated and a new oscillator cycle begins. Thus, if the SYNC pins of several LM5575-Q1 ICs are connected together, the IC with the highest internal clock frequency pulls the connected SYNC pins low first and terminate the oscillator ramp cycles of the other ICs. The LM5575-Q1 with the highest programmed clock frequency will serve as the master and control the switching frequency of the all the devices with lower oscillator frequency.
Figure 11. Simplified Oscillator Block Diagram and Sync I/O Circuit