SLVSAC4B November 2010 – December 2015 TLV62065
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
7 Detailed Description
7.1 Overview
The TLV62065 step-down converter operates with typically 3-MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents the converter can automatically enter power-save mode and operates then in pulse frequency modulation (PFM) mode.
During PWM operation, the converter use a unique fast response voltage mode controller scheme with input voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal, the high-side MOSFET switch is turned on. The current flows now from the input capacitor through the high-side MOSFET switch through the inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the control logic will turn off the switch. The current limit comparator will also turn off the switch in case the current limit of the high-side MOSFET switch is exceeded. After a dead time preventing shoot through current, the low-side MOSFET rectifier is turned on and the inductor current ramps down. The current flows now from the inductor to the output capacitor and to the load. It returns back to the inductor through the low-side MOSFET rectifier.
The next cycle will be initiated by the clock signal again turning off the low-side MOSFET rectifier and turning on the high-side MOSFET switch.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Mode Selection
The MODE pin allows mode selection between forced PWM mode and power-save mode.
Connecting this pin to GND enables the power-save mode with automatic transition between PWM and PFM mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light load currents. This allows simple filtering of the switching frequency for noise-sensitive applications. In this mode, the efficiency is lower compared to the power-save mode during light loads.
The condition of the MODE pin can be changed during operation and allows efficient power management by adjusting the operation mode of the converter to the specific system requirements.
7.3.2 Enable
The device is enabled by setting EN pin to high. At first, the internal reference is activated and the internal analog circuits are settled. Afterwards, the soft-start is activated and the output voltage is ramped up. The output voltages reaches 95% of its nominal value within tSTART of typically 500 µs after the device has been enabled. The EN input can be used to control power sequencing in a system with various DC–DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode. In this mode, all circuits are disabled and the SW pin is connected to PGND through an internal resistor to discharge the output.
7.3.3 Undervoltage Lockout
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery. It disables the output stage of the converter once the falling VIN trips the undervoltage lockout threshold VUVLO. The undervoltage lockout threshold VUVLO for falling VIN is typically 1.78 V. The device starts operation once the rising VIN trips the undervoltage lockout threshold VUVLO again at typically 1.95 V.
7.3.4 Thermal Shutdown
As soon as the junction temperature, TJ, exceeds 150°C (typical) the device goes into thermal shutdown. In this mode, the high-side and low-side MOSFETs are turned off. The device continues its operation with a soft-start once the junction temperature falls below the thermal shutdown hysteresis.
7.4 Device Functional Modes
7.4.1 Soft-Start
The TLV62065 has an internal soft-start circuit that controls the ramp up of the output voltage. Once the converter is enabled and the input voltage is above the undervoltage lockout threshold VUVLO the output voltage ramps up from 5% to 95% of its nominal value within tRamp of typically 250 µs.
This limits the inrush current in the converter during start-up and prevents possible input voltage drops when a battery or high impedance power source is used.
During soft-start, the switch current limit is reduced to 1/3 of its nominal value ILIMF until the output voltage reaches 1/3 of its nominal value. Once the output voltage trips this threshold, the device operates with its nominal current limit ILIMF.
7.4.2 Power-Save Mode
At TLV62065 pulling the MODE pin low enables power-save mode. If the load current decreases, the converter enters power-save mode operation automatically. During power save mode the converter skips switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The converter positions the output voltage typically +1% above the nominal output voltage. This voltage positioning feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the low-side MOSFET switch becomes zero, which indicates discontinuous conduction mode.
During the power-save mode, the output voltage is monitored with a PFM comparator. As the output voltage falls below the PFM comparator threshold of VOUTnominal +1%, the device starts a PFM current pulse. For this the high-side MOSFET switch will turn on and the inductor current ramps up. After the ON-time expires the switch will be turned off and the low-side MOSFET switch will be turned on until the inductor current becomes zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered current the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold, the device stops switching and enters a sleep mode with typical 18-µA current consumption.
In case the output voltage is still below the PFM comparator threshold, further PFM current pulses will be generated until the PFM comparator threshold is reached. The converter starts switching again once the output voltage drops below the PFM comparator threshold due to the load current.
The PFM mode is exited and PWM mode entered in case the output current can no longer be supported in PFM mode.
Figure 7. Power-Save Mode Operation With Automatic Mode Transition
7.4.2.1 100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle mode as the input voltage comes close to the nominal output voltage. In order to maintain the output voltage, the high-side MOSFET switch is turned on 100% for one or more cycles.
With further decreasing VIN the high-side MOSFET switch is turned on completely. In this case the converter offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be calculated by Equation 1:
where
- IOmax = maximum output current
- RDS(on)max = maximum P-channel switch RDS(on)
- RL = DC resistance of the inductor
- VOmax = nominal output voltage plus maximum output voltage tolerance
7.4.3 Internal Current Limit / Fold-back Current Limit for Short-Circuit Protection
During normal operation the high-side and low-side MOSFET switches are protected by its current limits ILIMF. Once the high-side MOSFET switch reaches its current limit, it is turned off and the low-side MOSFET switch is turned on. The high-side MOSFET switch can only turn on again, once the current in the low-side MOSFET switch decreases below its current limit ILIMF. The device is capable to provide peak inductor currents up to its internal current limit ILIMF.
As soon as the switch current limits are hit and the output voltage falls below 1/3 of the nominal output voltage due to overload or short circuit condition, the foldback current limit is enabled. In this case the switch current limit is reduced to 1/3 of the nominal value ILIMF.
Due to the short-circuit protection is enabled during start-up, the device does not deliver more than 1/3 of its nominal current limit ILIMF until the output voltage exceeds 1/3 of the nominal output voltage. This needs to be considered when a load is connected to the output of the converter, which acts as a current sink.
7.4.4 Output Capacitor Discharge
With EN = GND, the device enters shutdown mode and all internal circuits are disabled. The SW pin is connected to PGND through an internal resistor to discharge the output capacitor. This feature ensures a start-up in a discharged output capacitor once the converter is enabled again and prevents floating charge on the output capacitor. The output voltage ramps up monotonic starting from 0 V.