ZHCSHW9C March 2018 – July 2024 TUSB1002A
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1 4-Level Control Inputs
- 6.3.2 Linear Equalization
- 6.3.3 Adjustable VOD Linear Range and DC Gain
- 6.3.4 USB3.2 Dual Channel Operation (MODE = “F”)
- 6.3.5 USB3.2 Single Channel Operation (MODE = “1”)
- 6.3.6 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
- 6.3.7 Basic Redriver Operation (MODE = “0”)
- 6.4 Device Functional Modes
- 6.5 U0 Mode
- 6.6 U1 Mode
- 6.7 U2/U3 Mode
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGE|24
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGE|24
訂購信息
6.2 Functional Block Diagram
