SLVUCD3A November 2021 – August 2022 DRV8328
The DRV8328AEVM includes a variety of user-selectable jumpers and unpopulated components on the PCB to choose user settings and evaluate the DRV8328A, DRV8328B, DRV8328C, or DRV8328D device. A summary of those selectable settings is listed in Table 3-2 (defaults in bold) and can be seen on the board in Figure 3-6.
Section 3.4.1 and Section 3.4.2 describes the changes that need to be made to the board in order to use the variants of the DRV8328 device.
|
Id. |
Setting Name |
Description |
Position |
Function |
|---|---|---|---|---|
|
A |
nSLEEP switch |
Places DRV8328 in sleep mode |
S1 = Right |
Sleep mode |
|
S1 = Left |
Operating mode |
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|
B |
External CSA output filter |
RC output filter to suppress high frequency transients of CSA output from current shunt. |
R59 = 56 ohms, C31 = 2200 pF |
Fc ~1 MHz |
|
C |
Power stage MOSFETs and passive components |
Optional passive components for tuning power stage, for example series gate resistors, RC snubbers, PVDD-GND capacitors, PVDD-LSS capacitors |
R43, R44, R45, R49, R50, R51 = 10 ohm |
Series gate resistors (GHA, GHB, GHC, GLA, GLB, GLC) |
|
R40/C10, R41/C11, R42/C12, R55/C24, R56/C22, R57/C23 |
RC snubbers (HS FET A, HS FET B, HS FET C, LS FET A, LS FET B, LS FET C) |
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|
C14, C16, C18 = 2.2 uF |
PVDD-VDRAIN bypass capacitor |
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C19, C20, C21 = 0.01 uF |
PVDD-LSS bypass capacitors |
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|
D |
LDO jumpers |
Jumpers to enable the external LDO and disable the LDO output. Remove jumpers if DRV8328C/D is used. |
J8 = Populated |
LDO is enabled |
|
J8 = DNP |
LDO is disabled |
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|
J16 = Populated |
LDO outputs 3.3 V |
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|
J16 = DNP |
LDO output removed |
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|
E |
Dead time potentiometer, jumper, & resistor |
Jumper to enable dead time control from potentiometer and potentiometer used to set the resistance for DT pin (DRV8328A/B only). |
J14 = Populated |
DT from pot is enabled |
|
J14 = DNP |
DT from pot is disabled |
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|
R99 (CW = more DT, CCW = less DT) |
Sets dead time of gate outputs |
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|
R91 |
Fixed resistor for DT pin |
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|
F |
HALL_PWR select |
Use J6 to supply Hall power from 3.3 V or 5 V. |
J11 = AVDD |
Supplies AVDD to Hall power |
|
J11 = EXT |
Supply external hall power from HALL_PWR_EXT |
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|
G |
VDSLVL potentiometer, select and disable jumpers |
Potentiometer to set VDSLVL between 0.1-2.5 V, VDSLVL_SEL to select voltage source, disable jumper to disable VDSLVL |
J15 = POT |
VDSLVL set from potentiometer |
|
J15 = EXT |
VDSLVL set from VDS_EXT |
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|
J13 = Populated |
VDSLVL is disabled (100 kΩ to GVDD) |
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|
J13 = DNP |
VDSLVL is enabled |
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|
R92 |
Sets VDSLVL from 0.1 V-2.5 V |
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|
H |
DRV8328 A/B or C/D select |
0-ohm resistors to populate depending of variant of DRV8328 used on the EVM. |
R1-R10 = DNP, R11 – R21 = 0-ohm |
DRV8328A is populated |
|
DRV8328B is populated |
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|
R1-R10 = 0-ohm, R11 – R21 = DNP |
DRV8328C is populated |
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|
DRV8328D is populated |
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|
I |
DRVOFF switch |
Turns off the gate driver outputs. |
S2 = Down |
Drivers are on |
|
S2 = Up |
Drivers are off (DRVOFF is enabled) |
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|
J |
Phase voltage feedback |
Resistor divider and filtering capacitor for phase voltage feedback to MCU ADCs. |
R67, R70, C45 |
Phase A voltage feedback |
|
R68, R71, C46 |
Phase B voltage feedback |
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|
R69, R72, C47 |
Phase C voltage feedback |