TPS54425
- D-CAP2? Mode Enables Fast Transient Response
- Low Output Ripple and Allows Ceramic Output Capacitor
- Wide VIN Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.76 V to 5.5 V
- Highly Efficient Integrated FET’s Optimized
for Lower Duty Cycle Applications
– 65 mΩ (High Side) and 55 mΩ (Low Side) - High Efficiency, less than 10 μA at shutdown
- High Initial Bandgap Reference Accuracy
- Adjustable Soft Start
- Pre-Biased Soft Start
- 700-kHz Switching Frequency (fSW)
- Cycle By Cycle Over Current Limit
- Power Good Output
- APPLICATIONS
- Wide Range of Applications for Low Voltage System
- Digital TV Power Supply
- High Definition Blu-ray Disc Players
- Networking Home Terminal
- Digital Set Top Box (STB)
- Wide Range of Applications for Low Voltage System
The TPS54425 is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54425 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54425 uses the D-CAP2 mode control which provides a very fast transient response with no external compensation components. The TPS54425 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 5.5 V. The device also features an adjustable soft start time and a power good function. The TPS54425 is available in the 14-pin HTSSOP package, and designed to operate from –40°C to 85°C.
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技術(shù)文檔
| 類(lèi)型 | 標(biāo)題 | 下載最新的英語(yǔ)版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | 4-A Output Single Synchronous Step Down Switcher With Integrated FET (SWIFT) 數(shù)據(jù)表 (Rev. C) | 2011年 7月 25日 | |||
| 用戶(hù)指南 | TPS54425 Step-Down Converter Evaluation Module User's Guide (Rev. A) | PDF | HTML | 2021年 9月 2日 | |||
| 應(yīng)用手冊(cè) | 基于帶有紋波注入谷底檢測(cè)定導(dǎo)通時(shí)間頻域分析的D-CAP2?頻率響應(yīng)模型 | 英語(yǔ)版 | 2015年 9月 2日 | |||
| 設(shè)計(jì)指南 | 適用于 Xilinx FPGA 的模擬器件 解決方案指南 | 2012年 4月 24日 | ||||
| 應(yīng)用手冊(cè) | Understanding Thermal Dissipation and Design of a Heatsink | 2011年 5月 4日 |
設(shè)計(jì)和開(kāi)發(fā)
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TPS54425EVM-608 — 用于 TPS54425 4.5V 至 18V 輸入、4A 同步降壓轉(zhuǎn)換器的評(píng)估模塊
TPS54425 Unencrypted PSpice Transient Model Package (Rev. A)
TIDA-010011 — 適用于保護(hù)繼電器處理器模塊的高效電源架構(gòu)參考設(shè)計(jì)
PMP6776 — Xilinx Kintex 7 Low Cost reference design
| 封裝 | 引腳 | CAD 符號(hào)、封裝和 3D 模型 |
|---|---|---|
| HTSSOP (PWP) | 14 | Ultra Librarian |
訂購(gòu)和質(zhì)量
- RoHS
- REACH
- 器件標(biāo)識(shí)
- 引腳鍍層/焊球材料
- MSL 等級(jí)/回流焊峰值溫度
- MTBF/時(shí)基故障估算
- 材料成分
- 鑒定摘要
- 持續(xù)可靠性監(jiān)測(cè)
- 制造廠地點(diǎn)
- 封裝廠地點(diǎn)
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