ZHCSDZ2A February   2013  – July 2015 THS4532

PRODUCTION DATA.  

1. 1 特性
2. 2 應(yīng)用
3. 3 說(shuō)明
4. 4 修訂歷史記錄
5. 5 Related Products
6. 6 Pin Configuration and Functions
7. 7 Specifications
   1. 7.1 Absolute Maximum Ratings
   2. 7.2 ESD Ratings
   3. 7.3 Recommended Operating Conditions
   4. 7.4 Thermal Information
   5. 7.5 Electrical Characteristics: VS = 2.7 V
   6. 7.6 Electrical Characteristics: VS = 5 V
   7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: VS = 2.7 V
      2. 7.7.2 Typical Characteristics: VS = 5 V
8. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
         1. 8.3.1.1 Setting the Output Common-Mode Voltage
      2. 8.3.2 Power Down
   4. 8.4 Device Functional Modes
9. 9 Application and Implementation
   1. 9.1 Application Information
      1. 9.1.1  Frequency Response and Output Impedance
      2. 9.1.2  Distortion
      3. 9.1.3  Slew Rate, Transient Response, Settling Time, Overdrive, Output Voltage, and Turnon and Turnoff Time
      4. 9.1.4  Common-Mode and Power Supply Rejection
      5. 9.1.5  VOCM Input
      6. 9.1.6  Balance Error
      7. 9.1.7  Single-Supply Operation
      8. 9.1.8  Low-Power Applications and the Effects of Resistor Values on Bandwidth
      9. 9.1.9  Driving Capacitive Loads
      10. 9.1.10 Audio Performance
      11. 9.1.11 Audio On and Off Pop Performance
   2. 9.2 Typical Applications
      1. 9.2.1 SAR ADC Performance: THS5432 and ADS8321 Combined Performance
         1. 9.2.1.1 Design Requirements
         2. 9.2.1.2 Detailed Design Procedure
         3. 9.2.1.3 Application Curve
      2. 9.2.2 Audio ADC Driver Performance: THS5432 and PCM4204 Combined Performance
         1. 9.2.2.1 Design Requirements
         2. 9.2.2.2 Detailed Design Procedure
         3. 9.2.2.3 Application Curves
      3. 9.2.3 SAR ADC Performance: THS5432 and ADS7945 Combined Performance
         1. 9.2.3.1 Design Requirements
         2. 9.2.3.2 Detailed Design Procedure
         3. 9.2.3.3 Application Curve
   3. 9.3 Systems Examples
      1. 9.3.1 Differential-Input to Differential-Output Amplifier
         1. 9.3.1.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
      2. 9.3.2 Single-Ended to Differential FDA Configuration
         1. 9.3.2.1 Input Impedance
      3. 9.3.3 Single-Ended Input to Differential Output Amplifier
         1. 9.3.3.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
         2. 9.3.3.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
         3. 9.3.3.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
      4. 9.3.4 Differential Input to Single-Ended Output Amplifier
10. 10Power Supply Recommendations
11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
12. 12器件和文檔支持
    1. 12.1 文檔支持
    2. 12.2 社區(qū)資源
    3. 12.3 商標(biāo)
    4. 12.4 靜電放電警告
    5. 12.5 Glossary
13. 13機(jī)械、封裝和可訂購(gòu)信息