ZHCSLY5A August 2020 – July 2021 TPS65994AD
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Recommended Capacitance
- 6.5 Thermal Information
- 6.6 Power Supply Characteristics
- 6.7 Power Consumption
- 6.8 PP_5V Power Switch Characteristics
- 6.9 PP_EXT Power Switch Characteristics
- 6.10 Power Path Supervisory
- 6.11 CC Cable Detection Parameters
- 6.12 CC VCONN Parameters
- 6.13 CC PHY Parameters
- 6.14 Thermal Shutdown Characteristics
- 6.15 ADC Characteristics
- 6.16 Input/Output (I/O) Characteristics
- 6.17 I2C Requirements and Characteristics
- 6.18 Typical Characteristics
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 USB-PD Physical Layer
- 8.3.2 Power Management
- 8.3.3
Power Paths
- 8.3.3.1
Internal Sourcing Power Paths
- 8.3.3.1.1 PP_5Vx Current Clamping
- 8.3.3.1.2 PP_5Vx Local Overtemperature Shut Down (OTSD)
- 8.3.3.1.3 PP_5Vx Current Sense
- 8.3.3.1.4 PP_5Vx OVP
- 8.3.3.1.5 PP_5Vx UVLO
- 8.3.3.1.6 PP_5Vx Reverse Current Protection
- 8.3.3.1.7 Fast Role Swap
- 8.3.3.1.8 PP_CABLE Current Clamp
- 8.3.3.1.9 PP_CABLE Local Overtemperature Shut Down (OTSD)
- 8.3.3.1.10 PP_CABLE UVLO
- 8.3.3.2 Sink Path Control
- 8.3.3.1
Internal Sourcing Power Paths
- 8.3.4 Cable Plug and Orientation Detection
- 8.3.5 Default Behavior Configuration (ADCIN1, ADCIN2)
- 8.3.6 ADC
- 8.3.7 DisplayPort Hot-Plug Detect (HPD)
- 8.3.8 Digital Interfaces
- 8.3.9 Digital Core
- 8.3.10 I2C Interface
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RSL|48
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RSL|48
訂購信息
8.3.1.4 USB-PD BMC Transmitter
The TPS65994AD transmits and receives USB-PD data over one of the Px_CCy pins for a given CC pin pair (one pair per USB Type-C port). The Px_CCy pins are also used to determine the cable orientation and maintain the cable/device attach detection. Thus, a DC bias exists on the Px_CCy pins. The transmitter driver overdrives the Px_CCy DC bias while transmitting, but returns to a Hi-Z state allowing the DC voltage to return to the Px_CCy pin when not transmitting. While either Px_CC1 or Px_CC2 may be used for transmitting and receiving, during a given connection only the one that mates with the CC pin of the plug is used; so there is no dynamic switching between Px_CC1 and Px_CC2. Figure 8-5 shows the USB-PD BMC TX and RX driver block diagram.
Figure 8-5 USB-PD BMC TX/Rx Block DiagramFigure 8-6 shows the transmission of the BMC data on top of the DC bias. Note, The DC bias can be anywhere between the minimum and maximum threshold for detecting a Sink attach. This means that the DC bias can be above or below the VOH of the transmitter driver.
Figure 8-6 TX Driver Transmission with DC BiasThe transmitter drives a digital signal onto the Px_CCy lines. The signal peak, VTXHI, is set to meet the TX masks defined in the USB-PD Specifications. Note that the TX mask is measured at the far-end of the cable.
When driving the line, the transmitter driver has an output impedance of ZDRIVER. ZDRIVER is determined by the driver resistance and the shunt capacitance of the source and is frequency dependent. ZDRIVER impacts the noise ingression in the cable.
Figure 8-7 shows the simplified circuit determining ZDRIVER. It is specified such that noise at the receiver is bounded.
Figure 8-7 ZDRIVER Circuit