2.8 ARM Endianess
This section pertains only to KeyStone devices containing an ARM processor.
Memory access between the ARM subsystem and the rest of the device is accomplished with the OCP2VBUSM bridge. This bridge performs endianess translations when the device is in big endian mode. The ARM always operates in little endian mode. For Navigator purposes, some data and data structures require manipulation when accessed by a program running on the ARM:
- Descriptors. The header portion needs to be byte-swapped prior to pushing and following popping. Navigator uses a notion of descriptor ownership in that when the descriptor is pushed to a queue it is owned by the hardware, and owned by software when not pushed to a queue. Byte swapping follows this nicely in that when a descriptor is popped from a queue it should be byte swapped prior to reading header fields, then byte swapped again just before pushing it back to a queue. For linked Host descriptors, care must be taken to make sure that the next pointer has been byte swapped correctly for the ARM.
- Payload data for IP. For TX data going into an IP (such as an FFTC), the data needs to be byte swapped prior to pushing the corresponding descriptors. Similarly, when consuming an RX descriptor from an IP, the payload also needs to be swapped.
- Accumulator lists. The list of descriptor addresses provided by the Accumulator firmware needs to be byte swapped prior to consumption. Care must be taken due to the ping-pong nature of the lists; byte-swap only one side at a time - the side that is being consumed.