SLUSFS4A September 2025 – September 2025 UCC27734-Q1 , UCC27735-Q1
PRODUCTION DATA
The UCC277x5-Q1 has two separate ground pins, COM and VSS (refer to application diagram Simplified Schematic - D Package 14-Pin). The LO pin is referenced to COM, and the input pins (HI, LI, EN, VDD) are referenced to VSS. The COM pin does not have an internal low-impedance connection to VSS, and signals are transferred to LO through a level-shifter.
The separated grounds offer two advantages. First, the high-current gate drive loop can be connected locally through the COM pin rather than through VSS, This prevents the turn off gate current from returning through the VSS pin, which can reduce ground bounce and keeps the input voltage reference clean from switching noise. Second, the level-shifter allows COM to be biased at a different voltage than VSS. This enables the use of a negative turn-off bias which can help reduce false turn-on due to miller current injection, especially in SiC FETs.