SBASAZ5A October 2024 – September 2025 AMC0386-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Power Ratings
- 6.6 Insulation Specifications
- 6.7 Safety-Related Certifications
- 6.8 Safety Limiting Values
- 6.9 Electrical Characteristics
- 6.10 Switching Characteristics
- 6.11 Timing Diagrams
- 6.12 Insulation Characteristics Curves
- 6.13 Typical Characteristics
- 7 Detailed Description
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- DFX|15
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7.3.1 Analog Input
The resistive divider at the input of the AMC0386-Q1 scales down the voltage applied to the HVIN pin to a ±1V linear full-scale level. This signal is available on the SNSP pin, which is also the input of the analog signal chain.
The high-impedance input buffer on the SNSP pin feeds a second-order, switched-capacitor, feed-forward ΔΣ modulator. The modulator converts the analog signal into a bitstream that is transferred across the isolation barrier, as described in the Isolation Channel Signal Transmission section.
For reduced offset and offset drift, the input buffer is chopper-stabilized with the chopping frequency set at fCLKIN/16. Figure 7-1 shows the spur at 625kHz that is generated by the chopping frequency for a modulator clock of 10MHz.
| sinc3 filter, OSR = 1, fCLKIN = 10MHz, fIN = 1kHz |