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SLYW038D September 2014 – April 2025 AFE030 , AFE031 , AFE032 , ALM2402-Q1 , LMC6035-Q1 , LMV601 , LMV602 , LMV604 , LMV611 , LMV612 , LMV614 , LMV881 , OPA1602 , OPA1604 , OPA1612 , OPA1612-Q1 , OPA1622 , OPA1652 , OPA1654 , OPA1662 , OPA1662-Q1 , OPA1664 , OPA1688 , OPA170 , OPA170-EP , OPA171-Q1 , OPA172 , OPA180 , OPA188 , OPA191 , OPA192 , OPA197 , OPA211-EP , OPA2170 , OPA2171 , OPA2171-EP , OPA2171-Q1 , OPA2172 , OPA2180 , OPA2188 , OPA2192 , OPA2211-EP , OPA2211-HT , OPA2227-EP , OPA2277-EP , OPA2313 , OPA2314 , OPA2314-EP , OPA2314-Q1 , OPA2316 , OPA2317 , OPA2320-Q1 , OPA2322-Q1 , OPA2376-Q1 , OPA2625 , OPA313 , OPA314 , OPA316 , OPA317 , OPA320 , OPA322 , OPA348-Q1 , OPA355-Q1 , OPA4170 , OPA4171 , OPA4171-Q1 , OPA4172 , OPA4180 , OPA4188 , OPA4192 , OPA4277-EP , OPA4313 , OPA4314 , OPA4316 , OPA4317 , OPA4322 , OPA4322-Q1 , OPA549-HIREL , OPA564-Q1 , OPA625 , SM73307 , SM73308 , TLC2274-HT , TLE2141-Q1 , TLV2314 , TLV2316 , TLV2333 , TLV27L2-Q1 , TLV314 , TLV316 , TLV333 , TLV4314 , TLV4316 , TLV4333

1
Analog Engineer's Pocket Reference
Conversions
1. Standard decimal prefixes
2. Metric conversions
3. Temperature scale conversions
4. Error conversions ppm and percentage
5. Notes
Discrete Components
1. Resistor color code
2. Capacitor specifications
3. Capacitance type overview
4. Diodes and LEDs
5. Bipolar junction transistors (BJT)
6. Junction field effect transistors (JFET)
7. Metal oxide semiconductor field effect transistor (MOSFET)
8. Notes
Analog
1. Resistor equations
2. Power equations
3. Capacitor equations
4. Inductor equations
5. RMS and mean voltage
6. Logarithmic mathematical definitions
  1. Alternative notations
7. dB definitions
  1. Bode plot basics
  2. Definitions
  3. Log scale
  4. Time to phase shift
  5. Bode plots: Poles
8. Pole (equations)
  1. Bode plots (zeros)
  2. Zero (equations)
9. Notes
Amplifier
1. Basic op amp configurations
  1. Simple non-inverting amp with Cf filter
  2. Simple inverting amp with Cf filter
  3. Differential filter cutoff
  4. Calculating amplifier offset voltage
2. Op amp bandwidth
  1. Small signal step response
3. Full power bandwidth
4. Large signal response (slew rate)
5. Settling Time
6. Combining noise sources
  1. Averaging noise sources
  2. Noise bandwidth calculation
    1. Broadband total noise calculation
  3. 1/f total noise calculation
  4. Thermal noise calculation
  5. Op amp noise model
  6. Total noise calculations
7. AC response versus frequency (dominant 2-pole system)
8. Stability open loop SPICE analysis
  1. Stability transient square wave lab test
  2. Stability AC sine wave lab test
9. Power dissipation calculation
10. Electrical overstress (EOS) protection
11. Notes
PCB and Wire
1. PCB and Wire
2. PCB trace resistance for 1 oz-Cu
3. PCB trace resistance for 2 oz-Cu
4. Common package type and dimensions
5. PCB parallel plate capacitance
6. PCB microstrip capacitance and inductance
7. PCB adjacent copper traces
8. PCB via capacitance and inductance
9. Coaxial cable equations
10. Notes
Sensor
Digital
1. Binary/hex conversions
  1. Numbering systems: Binary, decimal, and hexadecimal
  2. Data formats
    1. Converting two’s complement to decimal: Negative number example
    2. Converting two’s complement to decimal: Positive number example
2. Digital logic thresholds
3. Serial peripheral interface
  1. SPI bus (Serial Peripheral Interface) hardware overview
    1. Data and control lines
  2. SPI data latching
    1. SPI read sequence example
  3. SPI critical edge
  4. SPI modes
4. Inter-integrated circuit (I2C) bus
  1. I2C bus (Inter-Integrated Circuit) hardware overview
    1. Data and control lines
  2. I2C addressing
  3. I2C communication
  4. I2C interface circuitry and rise/fall timing
  5. I2C pull-up resistor selection
5. Notes
ADC
1. ADC transfer function
  1. ADC definitions
  2. ADC resolution for unipolar
    1. Full-scale range (FSR) unipolar
  3. ADC resolution for bipolar
    1. Full-scale range (FSR) bipolar
  4. Resolution voltage vs. full-scale range
2. Quantization error of ADC
  1. Quantization error
3. Signal-to-noise ratio (SNR) from quantization noise only
4. Total harmonic distortion (VRMS)
5. Total harmonic distortion (dBc)
6. AC signals
  1. Signal-to-noise and distortion (SINAD) and effective number of bits (ENOB)
7. DC signals
  1. Noise free resolution and effective resolution
8. Settling time and conversion accuracy
9. ADC system noise calculation
10. Effect of clock jitter on ADC SNR
11. Notes
DAC
1. DAC errors
  1. DAC definitions
  2. DAC offset error
  3. DAC gain error
  4. DAC zero-code error / negative full-scale error
  5. DAC bipolar zero error
  6. DAC full-scale error
2. DAC non-linearity
  1. DAC differential non-linearity
  2. DAC integral non-linearity
3. DAC total unadjusted error
4. Notes
Multiplexer
1. CMOS switch construction
2. ON-resistance (RON)
3. RON flatness
4. Effective op amp gain including MUX RON
  1. Design tips
5. ON and OFF capacitance (CON/ COFF)
6. Leakage current
  1. Off leakage current
  2. On leakage current
7. Charge injection (QINJ)
8. Bandwidth (BW)
9. Channel-to-channel crosstalk (XTALK)
10. OFF-isolation
11. Total harmonic distortion plus noise (THD+N)
12. Notes
TI Worldwide Technical Support

Stability open loop SPICE analysis

Figure 51 Common spice test circuit used for stability

Loaded open-loop gain

Equation 132.

A_{OL_LOADED} = \frac{V_{O}}{V_{FB}}

Feedback factor

Equation 133.

β = V_{FB}

Closed-loop noise gain

Equation 134.

\frac{1}{β} = \frac{1}{V_{FB}}

Loop gain

Equation 135.

A_{OL_LOADED} \times β = V_{O}

Where

V_O = the voltage at the output of the op amp

V_OUT = the voltage output delivered to the load, which may be important to the application but is not considered in stability analysis

V_FB = feedback voltage

R_F, R₁, R_iS0 and C_L = the op amp feedback network and load. Other op amp topologies will have different feedback networks; however, the test circuit will be the same for most cases. Figure 50 shows the exception to the rule (multiple feedback).

C₁ and L₁ = components that facilitate SPICE analysis. They are large (1TF, 1TH) to make the circuit closed-loop for DC, but open loop for AC frequencies. SPICE requires closed-loop operation at DC for convergence.

Figure 52 Alternative (multiple feedback) SPICE test circuit used for stability

Loaded open loop gain

Equation 136.

A_{OL_LOADED} = V_{O}

Feedback factor

Equation 137.

β = \frac{V_{FB}}{V_{O}}

Closed-loop noise gain

Equation 138.

\frac{1}{β} = \frac{V_{O}}{V_{FB}}

Loop gain

Equation 139.

A_{OL_LOADED} \times β = V_{FB}

Where

V_O = the voltage at the output of the op amp

V_OUT = the voltage output delivered to the load. This may be important to the application but is not considered in stability analysis.

V_FB = feedback voltage

R_F, R₁, R_iso and C_F = the op amp feedback network. Because there are two paths for feedback, the loop is broken at the input.

C₁ and L₁ = components that facilitate SPICE analysis. They are large (1TF, 1TH) to make the circuit closed loop for DC, but open loop for AC frequencies. SPICE requires closed-loop operation at DC for convergence.

C_IN = the equivalent input capacitance taken from the op amp datasheet. This capacitance normally does not need to be added because the model includes it. However, when using this simulation method the capacitance is isolated by the 1TH inductor.