ZHCUBZ5A September 2021 – April 2024
CMPSS 模塊用于對(duì)相電流進(jìn)行過(guò)流監(jiān)測(cè)??墒褂?CMPSS DAC 設(shè)置閾值,如果電流檢測(cè)放大器的輸出超過(guò)該閾值,則 CMPSS 輸出會(huì)發(fā)生跳變。
如果使用定制電機(jī)驅(qū)動(dòng)器板,或者將代碼遷移到當(dāng)前通用電機(jī)控制實(shí)驗(yàn)不支持的 C2000 MCU 或 TI 電機(jī)驅(qū)動(dòng)器 EVM,則需要根據(jù)電機(jī)驅(qū)動(dòng)器和 C2000 MCU 連接在 hal.h 文件中正確修改 ADC 引腳和 CMPSS 模塊之間的連接。有關(guān) CMPSS 模塊內(nèi)部連接的更多詳細(xì)信息,請(qǐng)參閱 TMS320F28002x 實(shí)時(shí)微控制器技術(shù)參考手冊(cè)(修訂版 A)中的模擬引腳和內(nèi)部連接 表。
HAL 模塊根據(jù)所使用的電機(jī)驅(qū)動(dòng)器板配置 CMPSS 模塊。例如,LAUNCHXL-F280025C 和 BOOSTXL-DRV8323RS 之間的連接圖如圖 4-4 所示。以下步驟介紹了 CMPSS 模塊的配置(特定于電路板或特定于 MCU 的更改以粗體顯示)。
#define MTR1_CMPSS_U_BASE CMPSS1_BASE
#define MTR1_CMPSS_V_BASE CMPSS3_BASE
#define MTR1_CMPSS_W_BASE CMPSS1_BASE
// CMPSS
// For single phase current sensing, DRV8323RH and RS only
#define MTR1_IDC_CMPHP_SEL ASYSCTL_CMPHPMUX_SELECT_3 // CMPSS3-A14/C4*
#define MTR1_IDC_CMPLP_SEL ASYSCTL_CMPLPMUX_SELECT_3 // CMPSS3-A14/C4*
#define MTR1_IDC_CMPHP_MUX 4 // CMPSS3-A14/C4*
#define MTR1_IDC_CMPLP_MUX 4 // CMPSS3-A14/C4*
// For three-phase current sensing
#define MTR1_IU_CMPHP_SEL ASYSCTL_CMPHPMUX_SELECT_1 // CMPSS1-A11
#define MTR1_IU_CMPLP_SEL ASYSCTL_CMPLPMUX_SELECT_1 // CMPSS1-A11, N/A
#define MTR1_IV_CMPHP_SEL ASYSCTL_CMPHPMUX_SELECT_3 // CMPSS3-C4
#define MTR1_IV_CMPLP_SEL ASYSCTL_CMPLPMUX_SELECT_3 // CMPSS3-C4
#define MTR1_IW_CMPHP_SEL ASYSCTL_CMPHPMUX_SELECT_1 // CMPSS1-C7, N/A
#define MTR1_IW_CMPLP_SEL ASYSCTL_CMPLPMUX_SELECT_1 // CMPSS1-C7
#define MTR1_IU_CMPHP_MUX 1 // CMPSS1-A11
#define MTR1_IU_CMPLP_MUX 1 // CMPSS1-A11
#define MTR1_IV_CMPHP_MUX 4 // CMPSS3-C4
#define MTR1_IV_CMPLP_MUX 4 // CMPSS3-C4
#define MTR1_IW_CMPHP_MUX 3 // CMPSS1-C7
#define MTR1_IW_CMPLP_MUX 3 // CMPSS1-C7
void HAL_setupCMPSSs(HAL_MTR_Handle handle)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
... ...
uint16_t cmpsaDACH = MTR1_CMPSS_DACH_VALUE;
uint16_t cmpsaDACL = MTR1_CMPSS_DACL_VALUE;
... ...
ASysCtl_selectCMPHPMux(MTR1_IU_CMPHP_SEL, MTR1_IU_CMPHP_MUX);
ASysCtl_selectCMPLPMux(MTR1_IU_CMPLP_SEL, MTR1_IU_CMPLP_MUX);
ASysCtl_selectCMPHPMux(MTR1_IV_CMPHP_SEL, MTR1_IV_CMPHP_MUX);
ASysCtl_selectCMPLPMux(MTR1_IV_CMPLP_SEL, MTR1_IV_CMPLP_MUX);
ASysCtl_selectCMPHPMux(MTR1_IW_CMPHP_SEL, MTR1_IW_CMPHP_MUX);
ASysCtl_selectCMPLPMux(MTR1_IW_CMPLP_SEL, MTR1_IW_CMPLP_MUX);
for(cnt=0; cnt<3; cnt++)
{
// Enable CMPSS and configure the negative input signal to come from the DAC
CMPSS_enableModule(obj->cmpssHandle[cnt]);
// NEG signal from DAC for COMP-H
CMPSS_configHighComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
// NEG signal from DAC for COMP-L
CMPSS_configLowComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
// Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
// the asynchronous comparator output.
// Dig filter output ==> CTRIPH, Dig filter output ==> CTRIPOUTH
CMPSS_configOutputsHigh(obj->cmpssHandle[cnt],
CMPSS_TRIP_FILTER |
CMPSS_TRIPOUT_FILTER);
// Dig filter output ==> CTRIPL, Dig filter output ==> CTRIPOUTL
CMPSS_configOutputsLow(obj->cmpssHandle[cnt],
CMPSS_TRIP_FILTER |
CMPSS_TRIPOUT_FILTER |
CMPSS_INV_INVERTED);
// Configure digital filter. For this example, the maxiumum values will be
// used for the clock prescale, sample window size, and threshold.
CMPSS_configFilterHigh(obj->cmpssHandle[cnt], 32, 32, 30);
CMPSS_initFilterHigh(obj->cmpssHandle[cnt]);
// Initialize the filter logic and start filtering
CMPSS_configFilterLow(obj->cmpssHandle[cnt], 32, 32, 30);
CMPSS_initFilterLow(obj->cmpssHandle[cnt]);
// Set up COMPHYSCTL register
// COMP hysteresis set to 2x typical value
CMPSS_setHysteresis(obj->cmpssHandle[cnt], 1);
// Use VDDA as the reference for the DAC and set DAC value to midpoint for
// arbitrary reference
CMPSS_configDAC(obj->cmpssHandle[cnt],
CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
// Set DAC-H to allowed MAX +ve current
CMPSS_setDACValueHigh(obj->cmpssHandle[cnt], cmpsaDACH);
// Set DAC-L to allowed MAX -ve current
CMPSS_setDACValueLow(obj->cmpssHandle[cnt], cmpsaDACL);
// Clear any high comparator digital filter output latch
CMPSS_clearFilterLatchHigh(obj->cmpssHandle[cnt]);
// Clear any low comparator digital filter output latch
CMPSS_clearFilterLatchLow(obj->cmpssHandle[cnt]);
}
... ...
return;
}