ZHCUBZ5A September 2021 – April 2024
當(dāng)發(fā)生某些故障（例如電機(jī)驅(qū)動器跳閘引起的故障引腳或在 CMSS 模塊上檢測到過流事件）時，將采取措施來停止 MCU 的輸出 PWM。為實(shí)現(xiàn)此目的，對 ePWM 多路復(fù)用器和 ePWM 跳閘區(qū)域進(jìn)行配置以采取適當(dāng)?shù)牟僮?。本?jié)將介紹實(shí)現(xiàn)此目的的代碼。在使用自定義電機(jī)驅(qū)動器板、使用通用電機(jī)控制實(shí)驗(yàn)尚不支持的 TI 電機(jī)驅(qū)動器 EVM 或?yàn)椴煌?C2000 MCU 配置代碼時，必須對此代碼進(jìn)行適當(dāng)修改?？赡苄枰拇a更改用粗體突出顯示。有關(guān) X-BAR 的更多詳細(xì)信息，請參閱 TMS320F28002x 實(shí)時微控制器技術(shù)參考手冊中的 ePWM X-BAR 多路復(fù)用器配置表和輸出 X-BAR 多路復(fù)用器配置表。
//! \brief Defines the gpio for the nFAULT of Power Module
#define MTR1_PM_nFAULT_GPIO 34#define MTR1_XBAR_TRIP_ADDRL XBAR_O_TRIP7MUX0TO15CFG
#define MTR1_XBAR_TRIP_ADDRH XBAR_O_TRIP7MUX16TO31CFG
#define MTR1_IDC_XBAR_EPWM_MUX XBAR_EPWM_MUX05_CMPSS3_CTRIPL // CMPSS3-LP, single shunt only
#define MTR1_IDC_XBAR_MUX XBAR_MUX05 // CMPSS3-LP, single shunt only
#define MTR1_IU_XBAR_EPWM_MUX XBAR_EPWM_MUX00_CMPSS1_CTRIPH // CMPSS1-HP
#define MTR1_IV_XBAR_EPWM_MUX XBAR_EPWM_MUX04_CMPSS3_CTRIPH_OR_L // CMPSS3-HP&LP
#define MTR1_IW_XBAR_EPWM_MUX XBAR_EPWM_MUX01_CMPSS1_CTRIPL // CMPSS1-LP
#define MTR1_IU_XBAR_MUX XBAR_MUX00 // CMPSS1-HP
#define MTR1_IV_XBAR_MUX XBAR_MUX04 // CMPSS3-HP&LP
#define MTR1_IW_XBAR_MUX XBAR_MUX01 // CMPSS1-LP
#define MTR1_XBAR_INPUT1 XBAR_INPUT1
#define MTR1_TZ_OSHT1 EPWM_TZ_SIGNAL_OSHT1
#define MTR1_XBAR_TRIP XBAR_TRIP7
#define MTR1_DCTRIPIN EPWM_DC_COMBINATIONAL_TRIPIN7void HAL_setupMtrFaults(HAL_MTR_Handle handle)
{
... ...
// Configure TRIP7 to be CTRIP5H and CTRIP5L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(MTR1_XBAR_TRIP, MTR1_IU_XBAR_EPWM_MUX);
// Configure TRIP7 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(MTR1_XBAR_TRIP, MTR1_IV_XBAR_EPWM_MUX);
// Configure TRIP7 to be CTRIP3H and CTRIP3L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(MTR1_XBAR_TRIP, MTR1_IW_XBAR_EPWM_MUX);
// Disable all the mux first
XBAR_disableEPWMMux(MTR1_XBAR_TRIP, 0xFFFF);
// Enable Mux 0 OR Mux 4 to generate TRIP
XBAR_enableEPWMMux(MTR1_XBAR_TRIP, MTR1_IU_XBAR_MUX | MTR1_IV_XBAR_MUX | MTR1_IW_XBAR_MUX);
... ...
// configure the input x bar for TZ2 to GPIO, where Over Current is connected
XBAR_setInputPin(INPUTXBAR_BASE, MTR1_XBAR_INPUT1, MTR1_PM_nFAULT_GPIO);
XBAR_lockInput(INPUTXBAR_BASE, MTR1_XBAR_INPUT1);
for(cnt=0; cnt<3; cnt++)
{
EPWM_enableTripZoneSignals(obj->pwmHandle[cnt],
EPWM_TZ_SIGNAL_CBC6);
//enable DC TRIP combinational input
EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
MTR1_DCTRIPIN, EPWM_DC_TYPE_DCAH);
EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
MTR1_DCTRIPIN, EPWM_DC_TYPE_DCBH);
// Trigger event when DCAH is High
EPWM_setTripZoneDigitalCompareEventCondition(obj->pwmHandle[cnt],
EPWM_TZ_DC_OUTPUT_A1,
EPWM_TZ_EVENT_DCXH_HIGH);
// Trigger event when DCBH is High
EPWM_setTripZoneDigitalCompareEventCondition(obj->pwmHandle[cnt],
EPWM_TZ_DC_OUTPUT_B1,
EPWM_TZ_EVENT_DCXL_HIGH);
// Configure the DCA path to be un-filtered and asynchronous
EPWM_setDigitalCompareEventSource(obj->pwmHandle[cnt],
EPWM_DC_MODULE_A,
EPWM_DC_EVENT_1,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
// Configure the DCB path to be un-filtered and asynchronous
EPWM_setDigitalCompareEventSource(obj->pwmHandle[cnt],
EPWM_DC_MODULE_B,
EPWM_DC_EVENT_1,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
EPWM_setDigitalCompareEventSyncMode(obj->pwmHandle[cnt],
EPWM_DC_MODULE_A,
EPWM_DC_EVENT_1,
EPWM_DC_EVENT_INPUT_NOT_SYNCED);
EPWM_setDigitalCompareEventSyncMode(obj->pwmHandle[cnt],
EPWM_DC_MODULE_B,
EPWM_DC_EVENT_1,
EPWM_DC_EVENT_INPUT_NOT_SYNCED);
// Enable DCA as OST
EPWM_enableTripZoneSignals(obj->pwmHandle[cnt], EPWM_TZ_SIGNAL_DCAEVT1);
// Enable DCB as OST
EPWM_enableTripZoneSignals(obj->pwmHandle[cnt], EPWM_TZ_SIGNAL_DCBEVT1);
// What do we want the OST/CBC events to do?
// TZA events can force EPWMxA
// TZB events can force EPWMxB
EPWM_setTripZoneAction(obj->pwmHandle[cnt],
EPWM_TZ_ACTION_EVENT_TZA,
EPWM_TZ_ACTION_LOW);
EPWM_setTripZoneAction(obj->pwmHandle[cnt],
EPWM_TZ_ACTION_EVENT_TZB,
EPWM_TZ_ACTION_LOW);
}
... ...
return;
} // end of HAL_setupMtrFaults() function